The present invention relates to electronic integrated circuits and methods of fabrication, and, more particularly, to dielectrically isolated semiconductor integrated circuits and related fabrication methods.
Deep Trench isolation
As the packing density and operating frequency of integrated circuits has increased, the limitations of LOCOS isolation in silicon, both for bipolar and field effect devices, have become problems as described below. Trench isolation solves some of the LOCOS problems but introduces its own problems. In trench isolation. trenches of depth up to several .mu.m are etched in the silicon substrate, a channel stop implant may be introduced at the trench bottoms, the sidewalls of such trenches are coated with an insulator such as silicon dioxide ("oxide"), and the remaining portion of the trench opening, if any, is filled, usually with polycrystalline silicon ("polysilicon"). However, deep trenches between transistors and shallow trenches within devices would be of different widths and depths and would require separate etching, filling ( typically, deep trenches are filled with oxide and polysilicon, whereas shallow trenches are filled with oxide alone), and subsequent planarization steps. Thus, the processing steps become unwieldy.
Silicon-on-insulator substrates
Integrated circuits fabricated in silicon-on-insulator substrates offer performance advantages for both bipolar and field effect devices including low parasitic capacitance, low power consumption, radiation hardness, high voltage operation, freedom from latchup for CMOS structures, and the possibility of three dimensional integration. Indeed, isolation trenches extending through the silicon layer down to the insulation provide a simple approach to dielectric isolation of integrated circuit devices. Fabrication of devices on the silicon islands between the trenches typically follows standard silicon processing, including the usual LOCOS for lateral isolation by local oxide growth.
Additionally, silicon-on-insulator technology using very thin films offers special advantages for submicron devices. Scaling bulk devices tends to degrade their characteristics because of small-geometry effects, such as punch-through, threshold voltage shift, and subthreshold-slope degradation. The use of silicon-on-insulator devices suppresses these small-geometry effects. Therefore, even in the submicron VLSI era, silicon-on-insulator technology can offer even higher device performance than can bulk technology, along with the inherent advantages of silicon-on-insulator.
Silicon-on-insulator substrates may be fabricated in various ways: for example. wafer bonding as described by J. Lasky et al., Silicon-On-Insulator (SOI) by Bonding and Etch-Back, 1985 IEDM Tech. Deg. 684. and alternatively described in U.S. Pat. No. 5,266,135, and assigned to the assignee of the present application. These bonding methods essentially fuse two silicon wafers (a device wafer and a handle wafer) with an oxide layer and then thin the device wafer down to form the silicon-on-insulator layer. FIG. 1 shows such a bonded wafer 100 in cross sectional elevation view with silicon-on-insulator layer 102, oxide insulation layer 104, handle wafer 106. Deep isolation trenches 110 also appear in FIG. 1 with oxide 108 coated sidewalls and filled with polysilicon 112.
In known bonded wafer technology, to decrease parasitic capacitances in bipolar transistors and to increase transistor f.sub.T, a thick oxide layer may be used between the extrinsic base and the collector. In order to minimize surface undulation, this oxide is completely recessed. The method of fabricating such an oxide layer is the well known LOCOS technology. LOCOS technology, however, is not capable of producing a completely recessed oxide. During processing a so called `Bird 's Head` and `Bird 's Beak` develop at the perimeter of the oxide. See FIG. 2 showing the same items as FIG. 1 plus LOCOS oxide 120 with Bird's Head and Bird's Beak. The Bird's Head causes step coverage difficulties. The Bird's Beak is a lateral encroachment by the oxide, resulting in larger than necessary recessed oxide. The consequence of the Bird's Beak is that the contact areas of the base and collector of the bipolar transistor has to be increased, thus increasing the size of the whole transistor. It is known that by decreasing the transistor dimensions the high frequency performance of the transistor will increase. Therefore it is very important to minimize or completely eliminate the Bird's Head and Bird's Beak from the recessed oxide. Further, the growth of LOCOS oxide yields a stressed oxide which limits the thickness that can be tolerated.
Features
The present invention provides recessed isolation oxide for both bipolar and field effect devices with both deep and shallow isolation trenches which are simultaneously filled and planarized. This eliminates the typical shallow trench Bird's Head and Bird's Beak of LOCOS without excessive processing steps and in conjunction with deep trench processing. Further, it is compatible with bonded wafer processing as well as conventional processing.